SEEQC, Nvidia team for chip-to-chip link between quantum computers, GPUs
In a major step toward quantum-to-GPU heterogeneous computing, SEEQC said it is partnering with Nvidia as part of an effort to enable the first all-digital, ultra-low-latency chip-to-chip link between quantum computers and GPUs.
The collaboration pairs SEEQC’s Single Flux Quantum technology, known for low energy consumption requirements, with Nvidia’s GH200 Grace Hopper Superchip, which links GPU and CPU architectures into a single platform, and which Nvidia plans to ship sometime next year. SEEQC (which stands for Scalable Energy-Efficient Quantum Computing) said that when the companies complete their work, it will represent “the first time an active multi-chip module quantum processor will be directly linked with both a GPU- and a CPU-operational platform, creating a tightly coupled, fully digital integration of quantum and classical computing technologies.”
Among key benefits, the resulting integration will lower latency and reduce bandwidth needs by eliminating the need for analog links between chips, and expensive, bulky and noise-contributing hardware overheads in quantum processing, SEEQC stated.
The Elmsford, New York, company, said the approach will be compatible with processors from any type of quantum computing system, including superconducting, trapped-ion, neutral-atom, cold-atom, silicon-spin, and photonic.
Matthew Hutchings, CPO and co-founder of SEEQC, told IQT News via email, “SEEQC’s control chip solutions are compatible with quantum processors from IBM, Rigetti and others. This control chip could be incorporated with the SEEQC readout circuits to enable an ultra low latency conditional qubit reset. The full suite of SEEQC cryogenic control, readout, multiplexing and co-processing circuits can be integrated with qubits in our multi-chip module architecture to create a complete ‘active’ quantum processor to unlock system scaling for system developers.”
“This all-digital integration will take advantage of each system for a low-latency interface while maintaining the highest possible bandwidth performance from each individual system,” said John Levy, CEO and co-founder of SEEQC. “The development we’re taking on with Nvidia represents the best-of-breed in both quantum and classical; and, together, both core technologies create unprecedented compute power.”
Integrating quantum and GPUs is expected to help advance the Nvidia CUDA Quantum platform for hybrid quantum-classical computing. “Tight integration of quantum with GPU supercomputing is essential for progress toward useful quantum computing,” said Tim Costa, Director, HPC and Quantum Computing Product at Nvidia. “Coupling the Nvidia GH200 Grace Hopper Superchip with SEEQC’s digital chip architecture — tied together by the CUDA Quantum programming model — will provide a major step toward that goal.”
Jean-François Bobier, Quantum Computing research lead for Boston Consulting Group, added, “With this collaboration, SEEQC and Nvidia are paving the way for the enterprise-grade quantum computing era. A one-hour computation with high speed and low latency turns into 40 days on slower quantum architectures. Therefore, low latency is the key to scalable applications and error correction, which will unlock 90% of quantum computing use cases in value.”
Hutchings also said, “We are connecting quantum and classical computing in a highly efficient way, taking advantage of a tight integration of both technologies to power systems that will run the most important quantum and classical applications. The only way to do this and accommodate high speed, low latency and high bandwidth is to do so on a chip-to-chip basis. This collaboration creates not just the possibility for scalable, real-time error correction in the near-term, but future quantum applications, many of which are unimaginable today.”
Dan O’Shea has covered telecommunications and related topics including semiconductors, sensors, retail systems, digital payments and quantum computing/technology for over 25 years.
